In general, the mirror polishing of a semiconductor wafer such as a silicon wafer, a lens, a glass substrate, or some other matter to be polished is divided to rough polishing for a main purpose of adjusting the polished matter in flatness and in-plane evenness, and finish polishing for a main purpose of improving the matter in surface roughness, and removing scratches. In general, polishing characteristics required at the time of the rough polishing are largely different from ones required at the time of the finish polishing, as described above. It is therefore necessary to distinguish a polishing pad for rough polishing, and one for finish polishing from each other in the use thereof.
As a polishing pad used for rough polishing, suggested are pads as described below.
For example, Patent Document 1 listed up below suggests a polishing pad having a value of about 1 to 3.6 as the ratio between the E′ thereof at 30° C. and the E′ at 90° C. Patent Document 2 listed up below also suggests a chemical mechanical polishing pad including a polishing substrate having a value of 120 MPa or less as the storage modulus E′ (30° C.) at 30° C., and having a value of 2.5 or more as the ratio of the storage modulus E′ (30° C.) at 30° C. to the storage modulus E′ (60° C.) at 60° C. (E′(30° C.)/E′(60° C.)).
The polishing pads described in these patent documents are each very hard. Thus, when these are each used as a pad for rough polishing, a matter to be polished is made substantially flat at an edge region thereof as well as a central or the inner region thereof. However, the matter is low in work precision so that the matter is required to be again polished with a finishing pad. However, when the matter to be polished, which is in a substantially flat format the edge region as well as the central region, is polished with a polishing pad for finish polishing, a large pushing pressure is applied to the edge region of the matter so that the polish quantity at the edge region becomes larger than that of the central region. As a result, there remains a problem that an excessively polished phenomenon of the edge region, which is called “edge-subsidence”, is caused.    Patent Document 1: JP-W-2004-507076 (i.e., JP-A-2004-507076 according to the JPO)    Patent Document 2: JP-A-2006-114885